1. Field of the Invention
The present invention relates to a semiconductor wafer, and more specifically, to a semiconductor wafer suitably usable for wafer direct bonding and a semiconductor device using the semiconductor wafer.
Priority is claimed on Japanese Patent Application No. 2012-081931, filed Mar. 30, 2012, the content of which is incorporated herein by reference.
2. Description of the Related Art
All patents, patent applications, patent publications, scientific articles, and the like, which will hereinafter be cited or identified in the present application, will hereby be incorporated by reference in their entirety in order to describe more fully the state of the art to which the present invention pertains.
In order to enable a silicon wafer to be identified, forming a specific shape such as an oriental flat or a notch on a periphery section of a wafer (for example, see Japanese Unexamined Patent Application, First Publication No. H11-233389) or engraving with a lot number or a wafer number using a laser is conventionally known. The oriental flat or the notch is used for positioning a wafer mainly in a photo-lithography process or a probe process. Engraving using a laser is used to identify a wafer for each process by engraving with a lot number and a wafer number on a front surface or a rear surface of a wafer.